Library ieee; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; use ieee.std_logic_1164.all; entity DistanceCal is port( timeIn: in integer; Distance: out std_logic_vector(15 downto 0)); end DistanceCal; architecture behav of DistanceCal is signal conv_int: std_logic_vector(to_unsigned(timeIn, conv_int'length)); begin process(timeIn) begin conv_int. Your declaration of the signal conv_int is invalid. At first, you cannot use conv_int in the subtype indication on the right side because conv_int is not yet defined. You can use other signals (or objects), e.g. Distance, which are declared before. And will you have to specify a range with to or downto and not just the length of the std_logic_vector, e.g.: signal conv_int: std_logic_vector(to_unsigned(timeIn, Distance'length)-1); But this will not work either, because now the range is not constrained during elaboration because timeIn is not a constant. That means, you have to specify the range of the array type std_logic_vector at 'compile' time.

Canon Dslr Photo Editing Software Free Download. It would make sense here to have the same range for conv_int as for Distance because you assign conv_int to Distance later on. This declaration will be valid: signal conv_int: std_logic_vector(Distance'range); With this change, your code will analyze and elaborate (compile / synthesize). Now your integer to 'binary' conversion at this line conv_int.

Binary To BCD Conversion. This model came about as a result of wondering if there was a simple hardware way of converting a binary number to Binary Coded Decimal (BCD). The clue required (courtesy of a quick search on the web) was found in a Xilinx Application note, XAPP029. This documents a serial binary to bcd. Oct 19, 2011 Dear friends. I have problem with fixed point in VHDL, How to display binary fraction into LCD in decimal value? Example: 1001.10002 = 9.5 decimal 10012 =.